• List of Figures
  • List of Tables
  • List of Code Listings
  • Introduction
    • Research questions and thesis
    • Contributions
    • Structure
    • Terminology and conventions
  • Background
    • Parallelism and concurrency in programs and processors
      • Concurrent programs and tasks
      • Parallelism in a single core
      • Multi-core processing
      • Summarising parallelism and concurrency
    • Energy modelling
      • Hardware energy modelling
      • Software energy modelling
      • Summary
    • Influencing software energy consumption in embedded systems
      • Forming objectives to save energy in software
      • Energy's many relationships
      • Can we sit back and let Moore's Law do the work?
      • Efficiency through event-driven paradigms
      • Summary
    • A multi-threaded, multi-core embedded system
      • The XS1-L processor family
      • Swallow multi-core research platform
      • Research enabled by the XS1-L and Swallow
  • Constructing a multi-threaded, multi-core energy model
    • Model design and profiling of an XS1-L multi-threaded core
      • Strategy
      • Profiling device behaviour
      • Model design considerations
      • XMProfile: A framework for profiling the XS1-L
      • Generating tests
      • Profiling summary
    • Core level XS1-L model implementation
      • Workflow
      • A preliminary model
      • Preliminary model evaluation
      • An extended core energy model
      • Evaluation of the extended model
      • Beyond simulation
      • Summary
    • Multi-core energy profiling and model design using Swallow
      • Core energy consumption on Swallow
      • Network communication energy profiling
      • Determining communication costs
      • Summary of Swallow profiling
    • Implementing and testing a multi-core energy model
      • Workflow
      • Core and network timing simulation in axe
      • Communication aware modelling
      • Displaying multi-core energy consumption data
      • Demonstration and evaluation
      • I/O as an adaptation of the network model
      • Summary
    • Beyond the XS1 architecture
      • Epiphany
      • Xeon Phi
      • Multi-core ARM implementations
      • EZChip Tile processors
      • Summary of model transferability
    • Conclusions
      • Review of thesis contributions
      • Building a multi-core platform for energy modelling research
      • ISA-level energy modelling for a multi-threaded embedded processor
      • Multi core software energy modelling from a network perspective
      • The transferability of multi-threaded, multi-core models
      • Writing energy efficient multi-threaded embedded software
      • Future work
      • Concluding remarks
    • List of acronyms
    • Bibliography